Product Brief

Élan™SC520 Microcontroller

The Élan™SC520 microcontroller is the newest member of the Élan™ family of integrated x86 microcontrollers. The ÉlanSC520 microcontroller provides the optimal balance between integration and flexibility for Datacom, Telecom and Information Appliance applications. By taking the Am5x86™ microprocessor and enhancing it with patented AMDebug™ technology and then integrating that processor with a superior SDRAM memory controller, a PCI expansion bus and industry standard chipset functions, AMD has created a component that delivers the features and performance required by our customers.

Product Highlights

Standard Features

• Am5x86™ CPU Core
  • 133 and 100 MHz operation
  • 16 Kbyte write-back cache
  • Floating point unit (FPU)
• PCI Host Bridge Controller
  • 33 MHz, 32-bit PCI rev. 2.2 compliant
  • Supports up to 5 external PCI masters
• General Purpose (GP) Bus
  • Very programmable timing for flexible inter-operation with 8- and 16- bit devices
  • Supports up to 5 external PCI masters
  • IDE (HDD/DVD/CD-ROM) interface
• Synchronous DRAM Controller
  • Supports 16-, 64-, 128- and 256-Mbit DRAM
  • Supports Error Correction Code (ECC)
• AMDebug Technology
  • Allows instruction tracing during execution
• ROM/Flash Controller for 8-, 16- and 32-Bit Devices
• PC/AT Compatible Peripherals
  • Programmable interval timer
  • Real Time Clock with battery backup capability and 114 bytes of RAM
• Additional Integrated Peripherals
  • Three general purpose 16-bit timers
  • Watchdog timer and software timer
  • Synchronous Serial Interface (SSI)
• 32 programmable input/output (PIO) pins
• Native support for pSOS, RTXC, VxWorks, and Windows® CE operating systems
• 388-pin Plastic Ball Grid Array package

Key Features

PCI Host Bridge Controller:

The PCI host bridge controller allows up to 5 external PCI devices (including PCI bus masters) to be connected to the ÉlanSC520 microcontroller. This allows designers to utilize the many PCI peripherals that have been created for the PC market. A common example is to connect AMD's PCnet-FAST III (Am79C973). It is a 10/100 Mbps Ethernet controller.

AMDebug Technology:

On-chip debug support is provided through the addition of AMDebug technology. AMDebug consists of two components: an instruction trace cache and a communications port.

Because AMDebug includes an on-chip instruction trace cache, customers can:

• Trace instructions that are executed from the on-board L1 cache memory
• Trace instructions without any external hardware in their design (this is an advantage over many competitive debug solutions from other CPU vendors).

It is also worth noting that, unlike many competitive offerings, AMDebug technology consumes no CPU bandwidth and uses almost no power - so it can be left running all of the time. Therefore even in the unfortunate event of a system error or crash at a customer site, as long as power remains applied to the CPU the designer can still access the instruction trace cache to determine what happened.

There are two different ways to communicate with the AMDebug technology. The JTAG port is used for serial communication with AMDebug logic on the production version of the ÉlanSC520 processor. In addition, a special bond-out version of the ÉlanSC520 processor is available with a parallel communications link to the AMDebug logic. This parallel option allows real-time instruction trace.

General Purpose Bus:

The general purpose bus is a flexible 8- or 16-bit bus that can be used to easily interface to peripherals. It can even be used to implement an ISA-like bus that is capable of supporting many ISA peripherals. It cannot support bus-mastering ISA peripherals.

The general purpose bus is also used to connect ROM and flash memory. It can support 8- and 16-bit bus transfers. 32-bit ROM and flash memory transfers are possible by routing the memory's data lines to the MD bus of the SDRAM interface. Page mode transfers are supported. Burst mode transfers are not.

Development Tools and Support

ÉlanSC520 Customer Development Platform

The ÉlanSC520 Microcontroller Customer Development Platform (CDP) is a highly functional development platform and reference design for customers performing initial hardware and software development. The ÉlanSC520 development platform provides:

Memory:

• 512 Kbyte Flash memory for BIOS
• 16 Mbyte of Flash memory for instruction and data storage
• 64 Mbyte SDRAM DIMM

Input/Output Features:

• 10/100Base-T Ethernet (PCnet-FAST III)
• High-speed RS-422 (1.15 Mbps) and low-speed RS-232 (460 kbps) UARTs
• Super I/O chip: IDE controller, floppy disk controller, two serial ports, one parallel port, IrDA controller, AT keyboard controller, and PS/2 mouse controller

Expansion Features:

• Three PCI card slots
• Two ISA card slots

Debug Features:

• JTAG port
• AMDebug port (both versions: serial and parallel)
• Test Interface Port (TIP) connector
• Two digit hex LED display for tracking CPU and software status
• Logic analyzer connector

CokeKit™ Software Packages

A CodeKit software package is a standardized format that AMD's Embedded Processor Division uses to deliver software to customers. CodeKit software packages are designed to deliver higher quality, easier to understand and more consistent source code examples to AMD's embedded customers. At a minimum, a CodeKit software package consists of the following:

• A detailed readme file
• Tested source code
• A build script which will build the executable code
• A pre-built executable
• Royalty-free modification and distribution rights

AMD's E86™ Third-Party Support Program

AMD's FusionE86^(SM) partner program offers an extensive network of hardware and software vendors whose products can reduce the time-to-market of your designs. This program includes many of the market's leading vendors of compilers, emulators, software debuggers, logic analyzers, and other useful tools. A more complete list of FusionE86 partners can be found at www.amd.com.